The present disclosure relates to a semiconductor module including a vertical power semiconductor device.
In recent years, a surface mount integrated power module called POL (Power Over Lay) has been known. A semiconductor module of this type typically includes a dielectric film such as polyimide, a circuit part such as a power semiconductor device and a passive part mounted on one surface of the dielectric film, an electrode layer disposed on the other surface of the dielectric film, a sealing layer that covers the circuit part, and the like.
In accordance with the semiconductor module, the circuit part is electrically connected to the electrode layer via the dielectric film, and thus, it is possible to realize a power semiconductor module that achieves high integration of parts and shortening of the wiring length and that can be thinner and miniaturized while securing an insulation withstand voltage. Further, the design freedom of the electrode shape is high, and it is possible to form the electrode terminal in the power semiconductor device that controls passage of a large current into an arbitrary shape and size.
For example, Japanese Patent Application Laid-open No. 2015-170855 discloses a semiconductor device package in which a plurality of semiconductor devices are uniformly sealed with an embedding material between first and second dielectric layers each formed of a polyimide layer. In the first dielectric layer and the second dielectric layer, metal interconnects to be electrically connected to the front and rear surfaces of a semiconductor part are formed, thereby providing an electrical and thermal connection/path portion in the package structure.